Job category: 數位ic設計工程師

Job Description: The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification, Chip integration (floorplan design, package …

Job Description Direct manager and project lead Cloud data center product DFT task force short term: top DFT flow implement and signoff long term: DFT/test mode planning and new …

Working Location : Taipei / HsinChu Job Description SoC chip integration from RTL to gate level including timing closure and DFT Digital design methodology integration and QC flow …

Key Responsibilities • Defect Triage & Analysis: Investigate and categorize reported issues, including incorrect computation results, API failures, and build errors across …

Responsible for industry leading IP Synthesis/Formal/STA. 2 .Responsible for industry leading IP LINT/CDC/VSI. Responsible for industry leading IP regularly regression. …

1.Work with team members and apply design techniques to work on different phases of complex logic design for ASIC/SOC project. 2. Working on the following tasks from time to time: …

讓我們跨越國界，千里來相逢，用AI展翅翱翔，來尋找千載難逢的機會 (Tranxform.com 千逢科技) Hardware Design • Generative AI NPU design and hardware architecture • Memory system design (cache controller, DRAM …

讓我們跨越國界，千里來相逢，用AI展翅翱翔，來尋找千載難逢的機會 (Tranxform.com 千逢科技) Hardware design verification : • Develop verification environment. • Co-work with hardware designers to verify designs with …