1.Work with team members and apply design techniques to work on different phases of complex logic design for ASIC/SOC project. 2. Working on the following tasks from time to time: …
Responsible for industry leading IP Synthesis/Formal/STA. 2 .Responsible for industry leading IP LINT/CDC/VSI. Responsible for industry leading IP regularly regression. …
General Solution Architect / Execution PM
※Job Contents
Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …
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