Job category: 數位ic設計工程師

※ Job Contents: Block/Chip level DFT feature and architecture definition. DFT specification generation and review with customer co-work. Implement block/chip level DC/AC SCAN, …

The successful candidate will work with team members and apply his/her design techniques to work on different phases of complex logic design for ASIC/SOC project. The role will …

General Solution Architect / Execution PM ※Job Contents Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …

Chip Application Front-End Staff ※ Job Contents: Took responsibility of creating SDC for the complex SoC. Took responsibility of timing analysis with customer. Took responsibility …

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …

Develop advanced memory compilers, evaluate new memory architectures and methodologies Perform memory design QA flow and propose continuous improvement plans Provide technical …

General OSC/PLL/DLL/SSCG/CDR design & production experience LC-tank VCO design & production experience CDR design & production experience

DRAM DDRPHY Digital Part Circuit Design: 1. study and know the spec of DRAM (inculdeDDR5/DDR4/DDR4/LPDDR5/LPDDR4/LPDDR3) 2. study and know the protocol between memory controller 3. …