Job category: 數位ic設計工程師

These job listings are taken from Taiwan job sites for reference.

Source Source: 104
千逢科技股份有限公司

Generative AI NPU designer (DE)

讓我們跨越國界,千里來相逢,用AI展翅翱翔,來尋找千載難逢的機會 (Tranxform.com 千逢科技) Hardware Design • Generative AI NPU design and hardware architecture • Memory system design (cache controller, DRAM …
月薪80,000~300,000元
[新竹縣竹北市 Zhubei City, Hsinchu County]
Source Source: 104
千逢科技股份有限公司

Generative AI NPU design verification (DV) Engineer - Manager

讓我們跨越國界,千里來相逢,用AI展翅翱翔,來尋找千載難逢的機會 (Tranxform.com 千逢科技) Hardware design verification : • Develop verification environment. • Co-work with hardware designers to verify designs with …
月薪80,000~300,000元
[新竹縣竹北市 Zhubei City, Hsinchu County]
Source Source: 104
創意電子股份有限公司

G240009-DFT Technical Manager/Sr. Engineer

※ Job Contents: Block/Chip level DFT feature and architecture definition. DFT specification generation and review with customer co-work. Implement block/chip level DC/AC SCAN, …
待遇面議
[新竹市 Hsinchu City]
Source Source: 104
創意電子股份有限公司

G230018-Physical Design Staff/Technical Manager

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …
待遇面議
[新竹市 Hsinchu City]
Source Source: 104
緯創軟體股份有限公司

T-Software Engineer – GPU & Performance Analysis(台北)

Key Responsibilities • Defect Triage & Analysis: Investigate and categorize reported issues, including incorrect computation results, API failures, and build errors across …
待遇面議
[台北市南港區 Nangang District, Taipei City]
Source Source: 104
緯創軟體股份有限公司

T-MTS Silicon Design Engineer(遠端)

Responsible for industry leading IP Synthesis/Formal/STA. 2 .Responsible for industry leading IP LINT/CDC/VSI. Responsible for industry leading IP regularly regression. …
待遇面議
[台北市南港區 Nangang District, Taipei City]
Source Source: 104
Kaiku_開酷科技股份有限公司

Digital IC Design Engineer

Job Description: The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification, Chip integration (floorplan design, package …
待遇面議
[台北市南港區 Nangang District, Taipei City]
Source Source: 104
安霸股份有限公司

VLSI Physical Design Manager/Designer (KW: APR, P&R)

The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …
待遇面議
[新竹市 Hsinchu City]