IC package substrate design and layout 1.1. Package type includes flip-chip and wirebond. Single die design and multi-die design 1.2. Substrate layer count from 2 layers to 20+ …
The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …
Perform Netlist-to-GDS design flow, including floor planning, placement optimization, clock tree synthesis and routing. Support STA timing analysis and fixing. Perform physical …