工作類別: 數位ic設計工程師

The VLSI Physical Design Engineer is responsible for implementing and optimizing the layout of integrated circuits (ICs) from netlist to GDSII. This role plays a key part in …

This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at Cadence. The Cadence Digital and Signoff Group will offer you a dynamic environment in which …

1.Tapeout with multi-million gates count SOC design on cutting-edge technologies. 2.Develop UDSM design methodology for timing/power/reliability/DFM closures and low power designs. …

Job Description: The selected candidate will have to handle RTL design implementation, simulation verification, FPGA verification, Chip integration (floorplan design, package …

DRAM DDRPHY Digital Part Circuit Design: 1. study and know the spec of DRAM (inculdeDDR5/DDR4/DDR4/LPDDR5/LPDDR4/LPDDR3) 2. study and know the protocol between memory controller 3. …

Job Description: Design and implement the FPGA/CPLD function on the server motherboard and related sub cards. Complete FPGA/CPLD code writing and implementation, build …

※ Job Contents: Block/Chip level DFT feature and architecture definition. DFT specification generation and review with customer co-work. Implement block/chip level DC/AC SCAN, …

Physical Design Staff ※ Job Contents: Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …