Physical Design Staff ※ Job Contents:
Perform Netlist-to-GDS design flow, including floorplanning, placement, timing optimization, clock tree synthesis and routing. Support STA …
Analog Design Engineer (Power)
Tasks & Responsibilities 1.Circuit design from the transistor level, up to the system level simulation of analog/mixed-signal IC, such as DC/DC, …
General Solution Architect / Execution PM
※Job Contents
Handle project execution & management for advanced ASIC chip from Netlist-in to GDSII tapeout and silicon bring-up at …
Chip Application Front-End Staff ※ Job Contents:
Took responsibility of creating SDC for the complex SoC. Took responsibility of timing analysis with customer. Took responsibility …
Performs detailed semiconductor account analyses including but not limited to review discussion forum websites and product specifications. Plans, analyzes, and participates in …